"I miss the insanity of 80s processor design.

Intel’s iAPX 432 was a 'micromainframe'.

It had no general purpose registers, supported object orientation *directly*, and performed garbage collection on-chip." - Also by @lauriewired

https://threadreaderapp.com/thread/1925982635903398106.html

The i960 post by @kenshirriff is also worth checking out if you are interested in revolutionary architectures that just didn't really make it (while some concepts are still working in #IBMi and #CHERI I guess?):

https://www.righto.com/2023/07/the-complex-history-of-intel-i960-risc.html

@buherator @lauriewired @kenshirriff

Every ten years, Intel decides to build an architecture for which it is impossible to build a compiler. They did this with an iAPX432. They did it again with the i960. Then, again, with Itanium. Then a decade later with their exciting GPU architecture with the 2D register file. It's probably a sign of the decline of Intel that they haven't done this for more than a decade.

In contrast, we developed the CHERI ISA along with the compiler and OS and so are confident that it is actually usable by software.

@david_chisnall @lauriewired @kenshirriff I didn't mean offense towards CHERI (or IBM i), I find all of these concepts really interesting even if some of them didn't turn out to be widely adopted or even useful.

@buherator @lauriewired @kenshirriff No offence taken, I just wanted to clarify the difference in approaches. I believe IBM i had a similar flow of being driven by requirements from the mainframe software teams. Intel famously does not talk to compiler people until they've finalised an ISA.

@david_chisnall @kenshirriff Just for the record, I find this part of AS/400 history pretty fascinating (from Inside AS/400, by Frank Soltis) :)